Synopsys.ai Full Stack AI-Driven EDA
Suite with CPU-specific Optimizations Delivers Unparalleled PPA
with Highest Frequency and 10% Lower Power for Industry's Latest
Mobile CPU with Generative AI Capabilities
Highlights:
- Synopsys.ai EDA suite augmented with high-performance CPU PPA
optimizations delivers highest performance, power, and area
optimization for GAA nodes.
- Collaboration across Synopsys.ai full-stack AI-driven EDA suite
on Samsung Foundry's advanced GAA technologies enables ultimate
peak performance with lower power.
- Decades-long collaboration provides mutual customers with
leading AI-driven EDA suite to realize exceptional
quality-of-results and productivity gains on Samsung
processes.
SUNNYVALE, Calif., May 2, 2024
/PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS) today announced that
Samsung Electronics has achieved successful production tapeout for
its high-performance mobile SoC design, including flagship CPUs and
GPUs, with 300MHz higher performance using Synopsys.ai™ full stack
AI-driven EDA suite and a broad portfolio of Synopsys
IP on Samsung Foundry's latest Gate-All-Around (GAA) process
technologies. This significant achievement underscores the close
collaboration between Synopsys and Samsung to deliver exceptional
performance, power and area (PPA) for mutual customers, enabling a
new generation of chips with generative artificial intelligence
(AI) capabilities on Samsung Foundry advanced process nodes.
"Our longstanding collaboration has delivered leading-edge SoC
designs. This is a remarkable milestone to successfully achieve the
highest performance, power and area on the most advanced mobile CPU
cores and SoC designs in collaboration with Synopsys,"
said Jongpil Lee, vice president of SLSI at Samsung
Electronics. "Not only have we demonstrated that AI-driven
solutions can help us achieve PPA targets for even the most
advanced GAA process technologies, but through our partnership we
have established an ultra-high-productivity design system that is
consistently delivering impressive results."
"The relentless demand for ever-better PPA and energy efficiency
in high-performance mobile chips is driving the need for
high-performance core-specific EDA optimization across the full
stack," said Shankar Krishnamoorthy, General Manager of the EDA
Group at Synopsys. "Our extensive set of PPA-boosting capabilities
targeted for CPUs and GPUs across the Synopsys AI-driven EDA suite
and IP portfolio enables our mutual customers to successfully
design chips with the highest quality-of-results for the most
advanced Samsung GAA processes."
To achieve the stringent performance and low-power requirements
for Samsung's mobile SoC design, Samsung used
Synopsys' award-winning Synopsys.ai EDA suite, utilizing
Synopsys Fusion Compiler™ RTL-to-GDSII solution for
superior PPA paired with Synopsys DSO.ai™ to further optimize
design targets and maximize quality of results. High-performance
core-specific techniques such as design partitioning optimization,
multi-source clock tree synthesis (MSCTS), advanced wire
optimization to minimize crosstalk and virtual-flat hierarchical
solution in the Synopsys Fusion Compiler solution enabled Samsung
to achieve 300MHz higher performance than alternative approaches
and achieve 10% lower dynamic power, all while saving Samsung weeks
of manual design effort.
About Synopsys
Catalyzing the era of pervasive
intelligence, Synopsys, Inc. (Nasdaq: SNPS) delivers trusted and
comprehensive silicon to systems design solutions, from electronic
design automation to silicon IP and system verification and
validation. We partner closely with semiconductor and systems
customers across a wide range of industries to maximize their
R&D capability and productivity, powering innovation today that
ignites the ingenuity of tomorrow. Learn more
at www.synopsys.com.
Editorial Contact:
Kelli Wheeler
Synopsys, Inc.
(650) 584-5000
corp-pr@synopsys.com
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SOURCE Synopsys, Inc.