Cadence Debuts Verification Computing Platform, Accelerating Time and Improving Quality of System Development
April 26 2010 - 8:00AM
Marketwired
Cadence Design Systems, Inc. (NASDAQ: CDNS), the leader in global
electronic design innovation, today announced the first fully
integrated high-performance verification computing platform, called
Palladium XP, that unifies simulation, acceleration and emulation
into a single verification environment. Developed to support
next-generation designs, the highly scalable Palladium XP
verification computing platform lets design and verification teams
bring up their hardware/software environment faster and produce
better quality embedded systems in a shorter time.
Cadence® Palladium® XP supports design configurations up to 2
billion gates, delivering performance up to 4MHz and supporting up
to 512 users simultaneously. The platform also provides unique
system-level solutions, including low-power analysis and
metric-driven verification.
"Our system integration challenges require us to improve our
tools and methodologies continuously. Cadence has kept pace with
our requirements and provided us with an excellent verification
computing platform," said Narendra Konda, director of engineering,
NVIDIA. "Cadence Palladium XP helps us design, verify and integrate
the hardware and software components of our advanced graphics
processing unit (GPU) better than ever to stay at the top of our
game."
The Palladium XP verification computing platform provides
developers a high-fidelity representation of their design so they
can quickly and confidently locate and fix bugs, resulting in
better-quality IP, subsystems, SoCs and system. Design teams can
"hot swap" simulation with acceleration and emulation in a scalable
verification environment as needed, which speeds the verification
process and enables early access to testing embedded software and
evaluating performance implications of different IP and/or system
architectures.
"With the introduction of multicore IP platforms, ARM and our
customers are facing new design requirements to integrate and run
complex CPU sub-systems with software," said Dr. John Goodenough,
worldwide director of design technology at ARM. "Like its
predecessor, the Palladium XP verification computing platform will
be a valuable validation tool for these advanced designs. Our
initial trials have shown that the Palladium XP runs current ARM
workloads out of the box, with the additional ability to trade off
domain utilization for higher performance."
"The verification and hardware-software integration challenges
of new system designs in the wireless, multimedia and networking
markets are growing in complexity," said Ran Avinun, product
management group director for system design and verification at
Cadence. "By bringing together the best in Cadence simulation,
acceleration and emulation technologies, we are delivering a unique
platform that excels in bring-up time, ease of use, scalability and
turnaround time."
The Palladium XP verification computing platform is available
now worldwide. It is offered in two configurations, XL for design
teams, and GXL for enterprise-class global teams.
About Cadence Cadence enables global
electronic design innovation and plays an essential role in the
creation of today's integrated circuits and electronics. Customers
use Cadence software and hardware, methodologies, and services to
design and verify advanced semiconductors, consumer electronics,
networking and telecommunications equipment, and computer systems.
The company is headquartered in San Jose, Calif., with sales
offices, design centers, and research facilities around the world
to serve the global electronics industry. More information about
the company, its products, and services is available at
www.cadence.com.
Cadence, the Cadence logo, and Palladium are registered
trademarks of Cadence Design Systems, Inc., in the USA and other
countries. All other marks and names are the property of their
respective owners.
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