ChipEstimate.com Announces New IP Partners
December 08 2008 - 8:00AM
Marketwired
ChipEstimate.com announced today that more than a dozen IP
companies recently have joined or upgraded their memberships to the
ChipEstimate.com chip planning and IP portal.
New members joining at the Prime partner level are Cypress
Semiconductor, provider of high-performance mixed-signal,
programmable solutions; eMemory, provider of logic-compatible
embedded non-volatile memory (NVM) IP; and nSys, which offers a
large portfolio of verification IP used to accelerate design
schedules of customers developing ASICs and FPGAs. Twelve
additional companies are being added at the Choice partner
level.
"We are pleased to have these great companies join the
ChipEstimate.com IP partner community," said Sean O'Kane, marketing
director, Chip Planning Solutions. "They join an ever-expanding
group of IP vendors who have teamed up with ChipEstimate.com to
address the universal need of design teams to simplify and
accelerate the process of planning their next successful chip
project. ChipEstimate.com helps bring focus to our IP partner
products and services, allowing them greater visibility for their
IP offerings. This newly added IP enhances the options SoC design
teams can consider when seeking IP for a broad set of
applications."
Prime Partners
-- Cypress Semiconductor provides high-performance,
mixed-signal, programmable solutions
-- eMemory provides logic-compatible embedded non-volatile
memory (NVM) IP
-- nSys offers the world's largest portfolio of Verification IPs
to accelerate designs of customers developing ASIC/SoC/FPGAs
Choice Partners
-- Bluespec Inc. provides high-level synthesis toolsets and
solutions to accelerate architecture, verification and
implementation
-- Cambridge Consultants provides solutions in photonics and
complex electro-optic systems
-- Dolphin Integration offers standard cell libraries, memory,
analog and processor silicon IP together with EDA solutions
-- eSilicon Corporation is a leading fabless semiconductor
company that provides a comprehensive suite of ASIC design,
productization and manufacturing services
-- Evatronix is a complete digital IP solutions and design
services provider
-- Handshake Solutions offers tools and IP for ultra-low power
asynchronous IC design
-- HDL Design House is a provider of soft IP cores and offers
design and verification engineering services for SoC projects
-- Sarnoff Europe provides specialized ESD design solutions
-- Snowbush IP (a division of Gennum Corporation) offers PHY and
controller solutions for high-speed serial communication standards
like PCIe, SATA, SerDes
-- Transmeta Corporation develops and licenses innovative
computing, microprocessor and semiconductor technologies and
related intellectual property
-- The Western Design Center provides 65xx (GDSII and RTL
(Terbium)) microprocessor IP Cores, Tools, and Chips (fabless)
-- Wipro-Newlogic offers wireless LAN, Bluetooth, UWB, IEEE1394
IP cores for analog and digital IC design services
ChipEstimate.com was launched in 2005 to provide comprehensive
chip planning capabilities to the electronics and semiconductor
community.
In addition to searching the comprehensive IP catalog and using
IP Concierge, designers can download InCyte(TM) software at
ChipEstimate.com to plan their next chips and explore die size,
power, leakage, and cost tradeoffs. These IP providers can now be
searched for and considered in chip estimations with InCyte though
the ChipEstimate.com website.
About ChipEstimate.com
The ChipEstimate.com chip planning portal is an ecosystem
comprised of over 200 of the world's largest IP suppliers and
foundries. These companies all share in the common vision of
helping the worldwide electronics design community achieve greater
profitability and success. To date, a diverse global audience of
over 20,000 users has joined the ChipEstimate.com community and has
collectively performed over 80,000 chip estimations.
ChipEstimate.com is a property of Cadence Design Systems, Inc.
(NASDAQ: CDNS), the leader in global electronic design
innovation.
Cadence is a registered trademark and the Cadence logo and
InCyte are trademarks of Cadence Design Systems, Inc. in the United
States and other countries. All other trademarks are the property
of their respective owners. Any use of the term "partner" in this
release or in other ChipEstimate.com materials is in the sales and
marketing sense and the parties are not "partners" under the
technical legal definition of that term.
For more information please contact: Dean Solov Cadence Design
Systems 408-944-7226 dsolov@cadence.com
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