Pioneer in Secure Development Lifecycle brings
a new suite of assurance optimization tools, IP, and training to
mainstream SoC design
GAINESVILLE,
Fla., June 4, 2024 /PRNewswire/ -- Caspia
Technologies -- a pioneer in the development of a Secure
Development Lifecycle (SDL) for modern SoCs and electronic
components today announced that semiconductor and EDA industry
veteran Dr. Walden (Wally) C. Rhines
has joined the company as Chairman. The addition of Wally to the
management team will help accelerate the deployment of Caspia's
revolutionary assurance optimization capabilities to a broad range
of commercial designs.
Developed by a group of world-class university
researchers, the company's SDL approach for SoCs includes early
risk assessment, secure architecture and policies during planning
and application of an extensive set of design practices to optimize
system security. Comprehensive assurance verification and
validation is then applied to create end-to-end guidance, resolving
intra- and inter-stage vulnerabilities with quantified results.
The approach has been validated through multiple
government-sponsored programs and is now ready to deploy for
commercial SoC designs. The company's first EDA product, CODAx,
performs early analysis to identify and fix a wide range of design
practices that can lead to security weaknesses and potential
breaches.
Caspia is responding to the increasing incidence
of costly and potentially dangerous cybersecurity attacks that are
compromising both system software and hardware. The massive data
sets and models that drive the ubiquitous use of AI are becoming a
high-profile target for cyber criminals. According to Forbes, 2023
saw a 72% increase in data breaches since 2021, which held the
previous all-time record.
Traditional security enhancement methods focus on
analysis of the data, network, operating system, software and
associated firmware of the system. The underlying hardware
(integrated circuits) that run these systems is assumed to be
secure and trusted. The Caspia SDL methodology for SoC design
ensures the system hardware is optimized to resist a wide range of
security threats.
Caspia draws from many security sources,
including CVE, CWE, and Trust-Hub. Beyond that, the Caspia founding
team is advancing threat analysis and design techniques through the
group's advanced research and leadership across the industry.
"I am proud of the progress the Caspia team has
made in the development of a fundamentally new approach to system
assurance enhancement," said Dr. Mark Tehranipoor,
co-founder/advisor for Caspia Technologies and Department Chair
& Intel Charles E. Young Chair in Cybersecurity at the
University of Florida's Electrical and
Computer Engineering Department. "The holistic SDL approach to
assurance optimization will have significant impact. I am
absolutely delighted that Wally
Rhines has joined our team. His extensive knowledge and
experience in semiconductors and EDA will be invaluable."
"Data security and assurance at both the hardware
and software levels is critically important for continued
semiconductor innovation. I've been actively involved with the
government and through Cornami to address this problem," said
Wally Rhines. "Caspia's SDL for SoC
design is the most comprehensive approach to security and assurance
optimization I have seen. It will be a game-changer. I'm delighted
to help the Caspia team find its place in history."
Caspia Technologies is developing a complete
suite of tools, IP, and training to address security flaws at the
source. New product announcements will be coming soon.
About Caspia Technologies
Founded in 2020 and headquartered in Gainesville, Florida, Caspia Technologies is a
privately held company that is pioneering a holistic approach to
SoC security and assurance, known as the Secure Development
Lifecycle (SDL). Caspia's founding team brings together over 75
years of experience in various fields of the semiconductor market,
including design, fabrication, test, EDA development, and
importantly security and trust. Caspia delivers
security-focused solutions to both public and private customers to
enhance electronic designs and microelectronics physical
assurance.
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SOURCE Caspia Technologies