Synplicity Revolutionizes ASIC Verification Methodology with New TotalRecall Technology
January 08 2007 - 8:00AM
Business Wire
Synplicity, Inc. (Nasdaq:SYNP), a leading supplier of software for
the design and verification of semiconductors, today released
details on its TotalRecall� Full Visibility Technology. Synplicity
believes that this new technology will dramatically improve the
utility of FPGA prototypes as ASIC verification vehicles by giving
designers the ability to rapidly find bugs and verify that the
correct fix has been made. The TotalRecall technology allows access
to debug visibility that meets or exceeds that of an emulator,
while running at speeds of 10x to 100x faster. In addition, this
new innovative technology enables the capture of full signal
information leading up to an event, as well as after the event
occurs. The TotalRecall technology allows the capture of all of the
signals within a design (either a module or the full chip),
including memory states, a user-defined number of cycles prior to
the point at which an error occurs. The complete design state,
along with an automatically generated test bench, can then be
exported to an HDL simulator where the sequence can be replayed as
many times as necessary until the problem is understood and a fix
verified. The patented TotalRecall technology is unique in that it
allows fixes to be tested within the simulation environment using
exactly the same signal values that led to the bug occurring in the
first place. The TotalRecall technology also supports powerful
hardware verification techniques enabled by the use of assertions
synthesized into hardware. Many IC designers use assertions in the
design flow but do not fully utilize them for verification due to
their slow simulation speeds. Synthesizing assertions into FPGA
hardware allows aggressive use of assertions for verification, due
to the high speed at which the assertion can be tested. For
example, using a software simulator alone to run through a cell
phone boot up sequence would take in excess of 30 days. In an FPGA
prototype running at 20 MHz, however, that same boot up sequence
can be accomplished in 3 seconds, allowing full use of assertions
to detect bugs quickly and make fixes that can be rapidly validated
[1]. Combining FPGA-based prototyping, assertion synthesis and the
TotalRecall technology will enable bugs to be detected quickly when
compared to other methods that would either miss or not be able to
cover during verification. �TotalRecall technology is an exciting
step forward in debug visibility and productivity,� stated Gary
Meyers, president and CEO at Synplicity. �Combined with the already
high performance and low cost of FPGA prototypes, the new
capabilities of the TotalRecall technology will position prototypes
as the leading method for ASIC verification.� Unlike other
solutions, the TotalRecall technology works for non-deterministic
bugs found in live running hardware. For this class of bugs, and
other rarely occurring bugs, it is almost impossible to verify that
changes made to the RTL code have truly fixed a bug. For these
cases, combining the TotalRecall technology with FPGA-prototype
speeds will uniquely capture full design visibility before and
after the bug is triggered, providing the user with the full
environment required to verify the fix. Synplicity sees an
opportunity for its TotalRecall technology to be well integrated
with capabilities from outside partners, particularly members of
its Partners in Prototyping program. Synplicity will be developing
reference design flows and integration with all major simulation
environments. Further details on products containing the
TotalRecall technology will be available in mid 2007. About
Synplicity�s Partners in Prototyping Program Many of the world�s
leading FPGA-based prototyping board vendors have joined
Synplicity�s Partners in Prototyping (PIP) program to develop flows
for their boards using Synplicity�s tools. The PIP program is used
to identify and qualify design methodologies between Synplicity�s
prototyping applications and complementary RTL functional
prototyping hardware, software and design services. Members of the
program include Altera, AMO GmbH, ARM, The Dini Group, EVE,
Flexody, GiDEL, HARDI Electronics, Nallatech, ProDesign and
SK-Electronics Co. For more information on Synplicity�s Partners in
Prototyping go to
http://www.synplicity.com/partners/pip/index.html. About Synplicity
Synplicity� Inc. (Nasdaq:SYNP) is a leading supplier of innovative
software solutions that enable the rapid and effective design of
Programmable Logic Devices (FPGAs, PLDs and CPLDs) that serve a
wide range of communications, military/aerospace, consumer,
semiconductor, computer, and other electronic systems markets.
Synplicity's tools provide outstanding performance, cost and
time-to-market benefits by simplifying, improving and automating
key design planning, logic synthesis, physical synthesis and
verification functions for FPGA, FPGA-based ASIC verification, and
DSP designers. Synplicity is the number one supplier of FPGA
synthesis solutions and has been rated #1 in customer satisfaction
since 2004 in EE Times' Annual FPGA Customer Survey. Synplicity
products support industry-standard design languages (VHDL and
Verilog) and run on popular platforms. The company operates in over
20 facilities worldwide and is headquartered in Sunnyvale,
California. For more information visit http://www.synplicity.com.
Forward-Looking Statements This press release contains
forward-looking statements including, but not limited to,
statements regarding the performance, achievements and benefits of
the TotalRecall Full Visibility Technology. In some cases, you will
be able to identify forward-looking statements by terminology such
as �may,� �will,� �should,� �expects,� �can,� �believes� or the
negative of these terms or other comparable terminology. These
statements are only predictions and involve known and unknown
risks, uncertainties and other factors that may cause the actual
results to differ materially from the forward-looking statements,
including the performance and benefits of Synplicity�s software
relative to relevant industry methods or standards, design flaws,
design difficulties or other problems with the TotalRecall Full
Visibility Technology and the growth and changing technical
requirements in the FPGA market. For additional information and
considerations regarding the risks faced by Synplicity, see its
annual report on Form 10-K for the year ended December 31, 2005 as
filed with the Securities and Exchange Commission, as well as other
periodic reports filed with the SEC from time to time, including
its quarterly reports on Form 10-Q. Although Synplicity believes
that the expectations reflected in the forward-looking statements
are reasonable, Synplicity cannot guarantee the future performance
or achievements of its software. In addition, neither Synplicity
nor any other person assumes responsibility for the accuracy or
completeness of these forward-looking statements. Synplicity
disclaims any obligation to update information contained in any
forward-looking statement. The development, release, and timing of
the TotalRecall Full Visibility technology remains at Synplicity's
sole discretion. This press release is for information purposes
only, and may not be incorporated into any contract. Synplicity is
a registered trademark of Synplicity, Inc. TotalRecall is a
trademark of Synplicity, Inc. All other brands or products are the
trademarks or registered trademarks of their respective owners.
[1]: source: Applied Formal Verification, Douglas L. Perry, Harry
D. Foster, page 34 Table 3.4. Copyright 2005 McGraw Hill
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