EMC-3D Consortium Created for the Development of Cost-Effective 3D Thru-Silicon-Via Interconnect
October 11 2006 - 4:00AM
PR Newswire (US)
Equipment Providers, Materials Companies and Researchers Join in an
International Consortium to Address Complex Integration of
Thru-Silicon-Via (TSV) 3D Chip Interconnect SALZBURG, Austria, Oct.
11 /PRNewswire-FirstCall/ -- EMC-3D is a new consortium created to
address the technical and cost issues of creating 3D interconnects
using TSV technology for chip stacking and MEMS/sensors packaging.
Several major equipment manufactures have joined with material
companies to work with key research groups to address the issues of
cost-effective manufacturing and integration. Equipment companies
initiating the consortium are Alcatel (Paris: CGEP.PA and NYSE:
ALA), EV Group, Semitool (NASDAQ:SMTL) and XSiL. Associate research
members include Fraunhofer IZM, SAIT (Samsung Advanced Institute of
Technology), KAIST (Korea Advanced Institute of Science and
Technology) and TAMU (Texas A&M University). Material members
include Rohm and Haas, Honeywell, Enthone, and AZ with wafer
service support from Isonics (NASDAQ:ISON). The consortium will
develop processes for creating micro vias between 5 and 30um on
thinned 50um 300mm wafers using both via-first and via-last
techniques. Major processes being integrated into the EMC-3D
program are via etch and laser drill, insulator/barrier/seed
deposition, micro via patterning with RDL capabilities, high aspect
ratio Cu plating, carrier bonding, sequential wafer thinning,
backside insulator/barrier/seed deposition, backside lithography,
backside contact metal plating, chip-to-wafer placement and attach,
and dicing. In addition, wafer-to-wafer attach, dicing and
de-bonding will also be demonstrated. Cost of ownership goal for
the integrated 3D process is $200usd per wafer. About EMC-3D (or
EMC3D) EMC3D (Semiconductor 3D Equipment and Materials Consortium)
was created in September 2006 to develop a new 3D market and
technology by demonstrating a cost-effective, manufacturable,
stackable TSV interconnection process. TSV processes will be
developed for chip integration and MEMS/sensor packaging that are
based on plated metal electrodes and thinned wafers. For more
information, see http://www.emc3d.org/. Contacts for EMC3D Members
include: Equipment Members: Alcatel, France; (Paris: CGEP.PA and
NYSE: ALA) Jean-Marc Gruffat, Director of Business Development
Technology: Si and dielectric etching using DRIE EV Group, Austria;
Thorsten Matthias, Director of Technology North America Technology:
bonding, thin wafer handling, mask alignment lithography, conformal
coat and develop Semitool Inc, USA; (NASDAQ:SMTL), Bioh Kim,
Director of 3D Interconnect Technology: electroplating,
metal/barrier etch, photoresist strip, wafer cleaning and thinning
XSiL Ltd, Ireland; Richard F. Toftness, Vice President of Business
Development Technology: Si laser machining, via drilling, and wafer
dicing Isonics Corp, USA; (NASDAQ:ISON) Kim Bell, Director of Sales
Technology: wafer service (reclaim and test wafers, wafer thinning,
and thick-film SOI wafers) Materials Members: AZ Electronic
Materials, USA; Aldo Orsi, Global Product Manager Technology:
positive and negative acting photoresists Enthone (Cookson
Electronics), USA; Kristian Story, Key Account and Regional Line
Manager Technology: chemistry for electroplating and metal etch
Honeywell Electronic Materials, USA; (NYSE:HON) Brian Larabee,
Strategic Marketing Director Technology: thermal spreaders, thermal
interface materials, and electrical interconnect products Rohm and
Haas, USA; Bob Forman, Advanced Packaging Business Manager
Technology: chemistry for lithography, plating, etching, dielectric
formation, and bonding Technology Members: Fraunhofer IZM, Germany;
Jurgen Wolf, Group and Project Manager KAIST (Korea Advanced
Institute of Science and Technology), Korea; Dr. Kyung-Wook Paik,
Professor SAIT (Samsung Advanced Institute of Technology), Korea;
Dr. Yoon-Chul Sohn, Researcher TAMU (Texas A&M University),
USA; Dr. Manuel Soriaga, Professor DATASOURCE: Semitool, Inc.
CONTACT: Paul Siblerud, Vice President of Semitool Inc.,
+1-406-752-2107, ; or Geoff High of Pfeiffer High Investor
Relations, Inc., +1-303-393-7044, , for Semitool, Inc.
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