SAN JOSE, Calif., Oct. 6, 2015 /PRNewswire/ -- Xilinx, Inc.
(NASDAQ: XLNX) today announced the 2015.3 release of the Vivado®
Design Suite. The new release enables platform and system
developers to increase productivity and decrease development costs
by enabling design teams to work at a higher level of abstraction
with new market-tailored, plug-and-play IP sub-systems. The new IP
sub-systems, in combination with enhancements to Vivado IP
Integrator (IPI) and Vivado High-Level Synthesis (HLS),
significantly increase productivity by enabling the reuse of much
larger IP building blocks and associated content for rapid
integration and verification.
Logo - http://photos.prnewswire.com/prnh/20020822/XLNXLOGO
Taking Design to New Heights with IP
Sub-Systems
Xilinx's new LogiCORE™ IP sub-systems are highly
configurable, market-tailored building blocks that integrate up to
80 individual IP cores, software drivers, design examples, and test
benches. Available with the Vivado Design Suite 2015.3 release are
new IP sub-systems for Ethernet, PCIe, video processing, image
sensor processing, and OTN development. These IP sub-systems are
based on industry standards such as ARM® AMBA® AXI 4 interconnect
protocol, IEEE P1735 encryption and IP-XACT to enable
interoperability with Xilinx and Alliance member IP and to
accelerate integration.
"All of these IP sub-systems will dramatically improve
productivity by enabling the reuse of much larger building blocks
and all content required for rapid integration and verification,"
said Tom Feist, senior director of
Design Methodology Marketing at Xilinx. "What is especially unique
about our new video IP sub-system is that it was entirely written C
and C++ and leveraged Vivado HLS. Our internal development time was
about 4 months versus an estimated two years with an RTL flow, a 6X
productivity improvement for the team. We will continue to see
additional productivity gains in future generations. C-based IP
reuse not only enables the IP sub-system to be easily ported from
family to family but also enables automated re-optimization of the
micro-architecture and associated RTL for next generation systems
requirements and silicon characteristics."
The new highly configurable video processing IP sub-system
supports 4K2K video pipe with comprehensive video support including
VDMA, Deinterlacer, Chroma Resampler, and Scalar. The sub-system
can also easily source and sync DisplayPort, HDMI, and MIPI
interfaces by leveraging the automatically generated AXI interfaces
and Vivado IPI.
With the Vivado 2015.3 release, designers can also leverage the
new IP sub-systems by using an enhanced version of the Vivado IP
Integrator tool. Users can also take advantage of new simulation
flows featuring one click setup for all major simulators and
improved revision control to streamline IP integration and
verification.
Availability
The Vivado Design Suite 2015.3 is
available now with support for Xilinx® 7 series and UltraScale™
devices as well as early access support for UltraScale+™ FPGAs and
MPSoCs. Download the Vivado Design Suite 2015.3 at
www.xilinx.com/download. To learn more watch the Vivado QuickTake
Videos, sign up for training, and take advantage of the UltraFast
Design Methodologies.
About Xilinx
Xilinx is the leading provider of All
Programmable FPGAs, SoCs, MPSoCs, and 3D ICs. Xilinx uniquely
enables applications that are both software defined and hardware
optimized – powering industry advancements in Cloud Computing,
SDN/NFV, Video/Vision, Industrial IoT, and 5G Wireless. For more
information, visit www.xilinx.com.
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© Copyright 2015 Xilinx, Inc. Xilinx, the Xilinx logo, Artix,
ISE, Kintex, Spartan, Virtex, Vivado, Zynq, and other designated
brands included herein are trademarks of Xilinx in the United
States and other countries. AMBA is a registered trademark of ARM
in the EU and other countries. PCI, PCIe and PCI Express are
trademarks of PCI-SIG and used under license. All other trademarks
are the property of their respective owners.
Xilinx
Silvia E. Gianelli
(408)
626-4328
silvia.gianelli@xilinx.com
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SOURCE Xilinx, Inc.