MOUNTAIN VIEW, Calif.,
April 28, 2020 /PRNewswire/ --
Highlights:
- Built on Synopsys' Fusion Design Platform, world-class engines
and data model, 3DIC Compiler offers a consolidated end-to-end
solution with a full array of capabilities for advanced multi-die
system design – all under a single user environment
- Offers powerful 3D viewing capabilities which provide an
intuitive environment for 2.5D/3D package visualization and
significantly reduces design to analysis iterations and minimizes
the overall integration time
- Provides tight integration with Ansys' silicon-package-PCB
technology for system-level signal, power, and thermal
analysis
Synopsys, Inc. (Nasdaq: SNPS) today introduced its 3DIC
Compiler platform to transform the design and integration of
complex 2.5 and 3D multi-die system in a package. It provides an
unprecedented fully integrated, high-performance, and easy-to-use
environment, offering architectural exploration, design,
implementation, and signoff with signal, power, and thermal
integrity optimizations, all in one solution. With 3DIC Compiler,
IC design and packaging teams are enabled to achieve unparalleled
levels of multi-die integration, co-design and faster time to
convergence.
"Through our collaboration with Synopsys, we can now serve our
mutual customers with advanced multi-die package solutions for
high-end networking and high-performance computing applications,"
said Jaehong Park, executive vice president of Design Platform
Development at Samsung Electronics. "Synopsys' 3DIC Complier with
its unified platform is an industry disruptor in how advanced
multi-die packages are designed, as it has redefined the
conventional tool boundaries across the full design workflow for
2.5D/3D multi-die solutions."
A New Era in IC Packaging
With insatiable demand for increasing silicon scalability and
new system architectures, 2.5 and 3D multi-die integration have
become paramount to meet system-level performance, power, area, and
cost requirements. An increasing number of factors are driving
system design teams to leverage multi-die integration to address
new applications such as artificial intelligence and
high-performance computing. These applications are driving new
packaging architectures like chiplets and stacked-die, in
combination with high-bandwidth or low-latency memory to be
integrated in a package solution.
Disruption in Traditional IC Packaging Tools
With the advent of 2.5D and 3D IC, the IC packaging requirements
are much more like IC design requirements such as SoC-like scale,
with hundreds of thousands of inter-die interconnects. Traditional
IC packaging tools have been integrated, often loosely, with
existing IC Design tools. However, they are fundamentally
limited in scalability by their data models and begin to break with
the more complex design requirements of recent complex 3DIC
architectures. In addition, given the disjoint tools and
loosely integrated flows, the 3DIC design schedules are
unpredictable, long, and frequently non-convergent.
Introducing 3DIC Compiler
Synopsys' 3DIC Compiler is built on an IC design data model –
enabling scalability in capacity and performance with more modern
3DIC structures. It provides a single environment with
planning, architectural exploration, design, implementation,
analysis, and sign off – all in one. In addition, 3DIC
Compiler sets a new standard in IC packaging usability with its
unique and user-friendly visualization capabilities such as 360° 3D
view, cross probing, etc. for all views (architecture, planning,
design, implementation, analysis, and signoff).
Synopsys has partnered with Ansys, the global leader in
multi-physics simulation, to integrate Ansys'
RedHawk™ family of silicon-proven analysis
capabilities with 3DIC Compiler. RedHawk generates highly accurate
signal, thermal, and power data which are tightly integrated into
3DIC Compiler for package design. The automatic back-annotation
between RedHawk and Synopsys' 3DIC Compiler enables much faster
convergence with fewer iterations than disjoint solutions.
"Power and thermal analysis of an individual die in isolation is
no longer sufficient in a multi-die environment. The full system
needs to be analyzed together," said John
Lee, vice president and general manager at Ansys. "Through
our integration with Synopsys' 3DIC Compiler with its multi-die
design environment, designers can better optimize their overall
system solution for signal integrity, power integrity as well as
thermal integrity, while achieving faster convergence during
signoff."
"Synopsys' 3DIC Compiler, developed in close collaboration with
key customers and foundries, is poised to enable a new era of 3DIC
design," said Charles Matar, senior
vice president of System Solutions and Ecosystem Enablement for the
Design Group at Synopsys. "It offers a fully integrated set of
technologies, with SoC-scale capacity, for an unparalleled,
system-level and holistic approach to multi-die integration,
required for today's extremely complex leading-edge designs. This
will also enable our customers to innovate in package design and
provide solutions for heterogeneous system architectures."
For more information visit www.synopsys.com/3DIC.
About Synopsys
Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to
Software™ partner for innovative companies developing
the electronic products and software applications we rely on every
day. As the world's 15th largest software company, Synopsys has a
long history of being a global leader in electronic design
automation (EDA) and semiconductor IP and is also growing its
leadership in software security and quality solutions. Whether
you're a system-on-chip (SoC) designer creating advanced
semiconductors, or a software developer writing applications that
require the highest security and quality, Synopsys has the
solutions needed to deliver innovative, high-quality, secure
products. Learn more at www.synopsys.com.
Editorial Contact:
Simone
Souza
Synopsys, Inc.
650-584-6454
simone@synopsys.com
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SOURCE Synopsys, Inc.