MOUNTAIN VIEW, Calif.,
June 4, 2019 /PRNewswire/ --
Highlights:
- Samsung certified Synopsys Fusion Design Platform for 5LPE
process technology using 64-bit Arm Cortex-A53 and Cortex-A57
processors
- Fusion Design Platform redefines conventional design tool
boundaries to deliver full-flow better QoR and faster TTR, now for
Samsung Foundry's advanced 5LPE process
Synopsys, Inc. (Nasdaq: SNPS) today announced
that Samsung Electronics has certified the Synopsys Fusion
Design Platform™ for Samsung's 5-nanometer (nm)
Low-Power Early (LPE) process with Extreme Ultraviolet (EUV)
lithography technology. The AI-enhanced, cloud-ready Fusion Design
Platform provides unprecedented full-flow quality-of-results (QoR)
and time-to-results (TTR), enabling the full entitled performance
and low power delivered by Samsung's 5LPE process technology to
accelerate the next wave of semiconductor designs, including
high-performance computing (HPC), automotive, 5G, and artificial
intelligence (AI) market segments.
"Through our 7-nanometer product shipment and the
successful completion of 5-nanometer process development, we've
proven our capabilities in EUV-based nodes. Using the Synopsys
Fusion Design Platform, our mutual customers will be able to design
the most competitive 5LPE SoC products for the full entitled
performance and low power applications," said JY Choi, vice
president of Foundry Design Technology Team at Samsung
Electronics. "Synopsys continues to be our vendor of choice for
collaboration on new node development and enablement, so our
foundry customers can confidently ramp their designs to volume
production in all market segments, including automotive, AI,
high-performance computing, and mobile."
Samsung Foundry certified the Fusion Design Platform using the
64-bit Arm® Cortex®-A53 and Cortex-A57
processors, which are based on the Armv8 architecture. Key tools
and features of the Synopsys Fusion Design Platform optimized for
Samsung 5LPE process technology include:
- Fusion Compiler™ RTL-to-GDSII Solution: Highly
optimized full-flow support for latest 5LPE design rules delivering
optimum design routability and convergence coupled to fastest
TTR
- IC Compiler™ II place-and-route: EUV
single-exposure-based routing with optimized 5LPE design rule
support, single fin variant-aware legalization, and via stapling to
ensure maximum utilization while minimizing dynamic power
- Design Compiler® Graphical and Design Compiler NXT
RTL synthesis: Correlation, congestion reduction, pin access-aware
optimization, 5LPE design rule support, and physical guidance for
IC Compiler II
- IC Validator physical signoff: Cloud-optimized physical signoff
including DRC, LVS, and Fill. Innovative Explorer DRC and Live DRC
technologies for enhanced productivity
- PrimeTime® timing signoff: Near-threshold ultra-low
voltage variation modeling, via variation modeling, and placement
rule-aware engineering change order (ECO) guidance
- StarRC™ parasitic extraction: EUV single
pattern-based routing support, and new extraction technologies,
such as coverage-based via resistance and vertical gate resistance
modeling
- RedHawk™ Fusion: ANSYS RedHawk-driven EM/IR analysis
and optimization within place-and-route
- Synopsys TestMAX™ DFT and Synopsys TestMAX ATPG
test: FinFET-based, cell-aware, and slack-based transition testing
for higher test quality
- Formality® equivalence checking: UPF-based
equivalence checking with state transition verification
Synopsys' Fusion Design Platform is in active production usage
at market-leading companies; it redefines conventional design tool
boundaries with the fusion of best-in-class optimization and
industry-golden signoff and design-for-test (DFT) tools, enabling
the most predictable full-flow convergence with the fewest
iterations. The AI-enhanced platform boosts designer
productivity by speeding up computation-intensive analyses and
leverages past learning to achieve superior QoR. The Fusion Design
Platform provides a streamlined cloud-ready design environment and
is enabled on major public cloud providers' and Synopsys-hosted
infrastructure.
"Our long and successful collaboration with Samsung Foundry has
enabled our mutual customers to adopt Synopsys' market-leading
solutions early, certified on Samsung's most advanced node," said
Sassine Ghazi, general manager of
Synopsys' Design Group. "Combining the 5LPE benefits in power,
performance, and gate density with the Synopsys Fusion Design
Platform QoR and TTR advantages will enable our mutual customers to
differentiate their next-generation products. Synopsys continues to
focus on providing the best solutions for joint customers."
About Synopsys
Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to
Software™ partner for innovative companies developing
the electronic products and software applications we rely on every
day. As the world's 15th largest software company,
Synopsys has a long history of being a global leader in electronic
design automation (EDA) and semiconductor IP and is also growing
its leadership in software security and quality solutions. Whether
you're a system-on-chip (SoC) designer creating advanced
semiconductors, or a software developer writing applications that
require the highest security and quality, Synopsys has the
solutions needed to deliver innovative, high-quality, secure
products. Learn more at www.synopsys.com.
ANSYS, ANSYS Workbench, AUTODYN, CFX, FLUENT and any and all
ANSYS, Inc. brand, product, service and feature names, logos and
slogans are registered trademarks or trademarks of ANSYS, Inc. or
its subsidiaries in the United
States or other countries. All other brand, product, service
and feature names or trademarks are the property of their
respective owners.
Editorial Contact:
James
Watts
Synopsys, Inc.
650-584-1625
jwatts@synopsys.com
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SOURCE Synopsys, Inc.